Jitesh Poojary: h-index, Total Citations, and Citation Map
Jitesh Poojary's h-index is 8 (7 i10-index, 395+ total citations across 23+ publications) according to Google Scholar as of May 2026. Jitesh Poojary is affiliated with Marvell Semiconductors.
Jitesh Poojary is a researcher affiliated with Marvell Semiconductors, specializing in analog circuits, RF circuits, mixed signal. Their work has been cited 395 times. This profile visualizes their global influence, highlighting strong citation networks in United States.
Jitesh Poojary's Citation Metrics
Bibliometric impact based on 23 indexed publications.
- H-Index
- 8
- i10-Index
- 7
- Total Citations
- 395
- Citing Countries
- 35
As of May 2026.
Jitesh Poojary has an h-index of 8 and 395 total citations across 23 publications, with research cited by institutions in 35 countries.
Download Exports (PNG, CSV, Poster)
Free Viewing Jitesh Poojary's citation map is always free. Pay once to download poster, PNG, and CSV files for offline use or your visa packet.
Global Impact Map
Visualizing the geographic distribution of institutions that have cited your work.
Starting…
Pins will appear here as institutions are resolved — no need to refresh.
Top Cited Works
Tip: clickto hide a row from the map
GANA: Graph convolutional network based automated netlist annotation for analog circuits
2020119
Top Citing Countries
Top Citing Institutions
Visa Evidence Package
Views and exports tuned for EB-1A, O-1A, and EB-2 NIW petitions. Sustained acclaim, geographic reach, and independent-citation filtering are the strongest evidence categories immigration adjudicators look for.
Significant Contributions
Auto-detected research lines — a seminal paper and the follow-up work building on it. Review and edit before using in a petition. Each Free PDF opens in a new tab — EB-1A organises this into the structure USCIS applies to Criterion 5 of 8 CFR § 204.5(h)(3)(v); EB-1B re-frames it under § 204.5(i)(3) (outstanding researcher); NIW presents it under prong 2 of Matter of Dhanasar.
64 citing papers could not be classified (no author data) — excluded from the percentages above.
The researcher pioneered graph convolutional networks for automated analog circuit netlist annotation, establishing a foundational framework that subsequent work has extended to hierarchical structures and broader EDA integration.
The researcher developed the ALIGN open-source analog layout generator and advanced the field by integrating machine learning techniques into analog layout automation.
Citation trend (last 10 years)Click to expand
Citation Trend (Last 10 Years)
Related Guides
Learn how to use citation maps for your research and visa applications.
